Semiconductor memory is used extensively and ubiquitously through all classes of computing systems, from tiny battery powered IoT sensors to massive server farms.
In the past 50 years, memory technologies have evolved into specialized uses:
DRAM as the main processing memory, with high speed, unlimited write cycles and low cost critical
SRAM as computing cache, where the highest possible speed and unlimited write cycles are paramount, at the expense of cost and power
Flash as the code/data storage memory, with permanent ‘power off’ data retention mandatory, regardless of all other parameters
MRAM has emerged in the last decade with the promise of combining all qualities into a single device. However, the current generation MRAM (dubbed “STT”), now being popularized in leading foundries, is limited to embedded Flash replacement due to uncompromisable performance specs intersection intrinsic STT limits. Antaios’ SOT MRAM, which provides unlimited write cycles at very high speed, without further compromises in data retention and energy, expands the promise of MRAM with large and ready opportunities:
As embedded NVM with write endurance improved by orders of magnitude wrt STT.
By combining, in microcontroller chips, cache (a.k.a. SRAM) and NVM (a.k.a. e-Flash) capabilities into a single memory, for what is called Execute-In-Place (XIP) memory architecture.
As high speed, high density embedded cache, which is nearly universal in digital chips.
With the incumbent SRAM and e-Flash technologies now facing ballooning costs and severe power issues, with a large and increasing installed MRAM manufacturing base at major semiconductor foundries, and with SOT MRAM being the only solution in sight, the market will be reflective to replacement with a new, better solution !